Faculty Information - Wakabayashi Shinichi |

Wakabayashi Shinichi

Department / Course Hiroshima City University Hiroshima City University

Job President Chairman

Book and thesis
Papers	Enhancing security of generalization methods based on m-invariance for dynamic data publication Proc. 2024 IEEE 48th Annual Computer Software and Applications Conference,pp.1554-1555 (Co-authored) 2024/07/02
Papers	A proposal of equivalnce classes in maximally asymmetric functions and their application to benchmark generation 2024 IEEE 54th International Symposium on Multiple-Valued Logic,pp.65-70 (Co-authored) 2024/05/28
Papers	Introduction of a new method for preventing recipient unapproved transactions to Bitcoin Wallet Proc. 2022 IEEE 46th Annual Computer Software and Applications Conference,pp.767-772 (Co-authored) 2022/06/27
Papers	A proposal of equivalance classes for index generation functions based on their row-shift decompositions Proc. 31st International Workshop on Post-Binary ULSI Systems (Co-authored) 2022/05/18
Papers	A protocol for preventing transaction commitment without recipient s authorization on blockchain and its implementation IEEE Access 9,pp.24390-24405 (Co-authored) 2021
Papers	On a Generation Method of Benchmark Maximally Asymmetric Functions Proc. 29th International Workshop on Post-Binary ULSI Systems (Co-authored) 2020/11/11
Papers	A framework for fast MapReduce processing considering sensitive data on hybrid clouds Proc. 2020 IEEE 44th Annual Computer Software and Applications Conference,pp.1357-1362 (Co-authored) 2020/07/13
Papers	A verifiable secret sharing scheme without using multi-party computations Proc. 2020 IEEE 44th Annual Computer Software and Applications Conference,pp.845-850 (Co-authored) 2020/07/13
Papers	A Protocol for Preventing Transaction Commitment without Recipient’s Authorization on Blockchain Proc. 2019 IEEE 43rd Annual Computer Software and Applications Conference (COMPSAC),pp.934-935 (Co-authored) 2019/07
Papers	A Nearest Neighbor Search Engine Using Distance-based Hashing Proc. 2018 International Conference on Field-Programmable Technology (FPT2018),pp.153-160 (Co-authored) 2018/12
Papers	An Approximate Nearest Neighbor Search Algorithm Using Distance-Based Hashing Proc. International Conference on Database and Expert Systems Applications (DEXA 2018),pp.203-213 (Co-authored) 2018/09
Papers	Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection Proc. Euromicro Conference on Digital System Design (DSD2018),pp.85-90 (Co-authored) 2018/08
Papers	An FPGA-based Nearest Neighbor Search Engine Using Distance-based Hashing for High-Dimensional Data Proc. 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2018),pp.347-352 (Co-authored) 2018/03/26
Papers	A Programmable Architecture Based on Vectorized EVBDDs for Network Intrusion Detection Using Random Forests Proc. 2017 International Symposium on Nonlinear Theory and Its Applications (NOLTA2017) (Co-authored) 2017/12/04
Papers	Table Reference-Based Acceleration of a Lithography Hotspot Detection Method Based on Approximate String Search Proc. 10th International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS2017),pp.10-14 (Co-authored) 2017/09/10
Papers	An Efficient FPGA Implementation of Mahalanobis Distance-Based Outlier Detection for Streaming Data Proc. 2016 International Conference on Field-Programmable Technology,pp.253-256 (Co-authored) 2016/12/03
Papers	A High-Speed Programmable Network Intrusion Detection System Based on a Multi-Byte Transition NFA Proc. 9th International Conference on Advances in Circuits, Electronics and Microelecronics,pp.45-51 (Co-authored) 2016/07/28
Papers	A Hotspot Detection Method Based on Approximate String Search Proc. 9th International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS2016),pp.6-12 (Co-authored) 2016/07/24
Papers	Inter-FPGA Routing for Partially Time-Multiplexing Inter-FPGA Signals on Multi-FPGA Systems with Various Topologies IEICE Transactions on Fundamentals E98-A (12),pp.2572-2583 (Co-authored) 2015/12/01
Papers	An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating IPSJ Transactions on System LSI Desigh Methodology 7,pp.110-118 (Co-authored) 2014/08/01
Papers	A Pattern Independent Regular Expression String Matching Machine and Its FPGA Implementation,pp.2159-2167 (Co-authored) 2009/12
Papers	A Parallel Simulated Annealing Algorithm for LSI Floorplanning Running on Multicore Processors Proc. 24th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2009),pp.851-854 (Co-authored) 2009/07
Papers	A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set Proc. 2009 International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2009),pp.151-157 (Co-authored) 2009/07
Papers	Design and FPGA Implementation of Efficient Discrete Function Generators Using Piecewise Polynomial Approximations Proc. 24th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2009),pp.1016-1019 (Co-authored) 2009/07
Papers	A Fast Regular Expression Matching Engine for an FPGA-based Network Intrusion Detection System Proc. 15th Workshop on Synthesis And System Integration of Mixed Information technologies,pp.88-93 (Co-authored) 2009/03
Papers	A Systolic Regular Expression Pattern Matching Engine and its Application to Network Intrusion Detection Proc. 2008 IEEE International Conference on Field Programmable Technology (ICFPT 2008),pp.297-300 (Co-authored) 2008/12
Papers	Efficient FPGA-based Hardware Algorithms for Approximate String Matching Proceedings of the 23rd International Technical Conference on Circuits/Systems, Computers and Communications,pp.201-204 (Co-authored) 2008/07
Papers	A Systolic Algorithm for the Quadratic Assignment Problem and its FPGA Implementation Proceedings of the International Conference on Field Programmable Technology 2007,pp.261-264 (Co-authored) 2007/12
Papers	Design and FPGA Implementation of a High-Speed String Matching Engine Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies,pp.122-129 (Co-authored) 2007/10
Papers	A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning Proc. 2007 International Conference on Parallel and Distributed Processing Techniques and Applications,pp.801-807 (Co-authored) 2007/06
Papers	A Privacy Protection Algorithm to Convert Data into Data Having k-Anonymity with Minimal Distortion DBSJ Letters,pp.97-100 (Co-authored) 2007/06
Papers	FPGA Implementation of Tabu Search for the Quadratic Assignment Problem Proceedings of the 2006 IEEE International Conference on Field Programmable Technology,pp.269-272 (Co-authored) 2006/12
Papers	Interactive Clustering Based on a Feature Extraction Method for Clustering Results on High Dimensional Data Sets,pp.28-41 (Co-authored) 2006/12
Papers	A Decision Method of Attribute Importance for Classification by Outlier Detection Proc. Second International Special Workshop on Databases for Next-Generation Researchers,pp.45-50 (Co-authored) 2006/04
Papers	A Parallel Implementation of a Genetic Algorithm-Based Floorplanning Method on PC Clusters Proceedings of the Workshop on Synthesis and System Integration of Mixed Information Technologies,pp.404-411 (Co-authored) 2006/04
Papers	FlexDice: A fast clustering method for large high dimensional deta sets IPSJ Journal: Database,pp.40-49 (Co-authored) 2005/12
Papers	Solving the Minimum Dominating Set Problem with Instance-Specific Hardware on FPGAs Proc. 2005 IEEE International Conference on Field Programmable Technology (FPT 2005),pp.69-76 (Co-authored) 2005/12
Papers	An instance-specific hardware algorithm for solving the minimum dominating set problem Information Technology Letters,pp.37-40 (Co-authored) 2005/09
Papers	A Clustering Method Using Irregular Size Cell Graph Proc. RIDE Workshop of Stream Data Mining and Applications RIDE-SDMA 2005 (RIDE: 15th International Workshop on Research Issues on Data Engineering),pp.19-26 (Co-authored) 2005/04
Papers	An Algorithm for Computing Global-Based Outlier Degrees on Data Sets Proc. International Special Workshop on Databases For Next Generation Researchers (SWOD 2005),pp.16-19 (Co-authored) 2005/04
Papers	Feature Extraction of Clusters Based on FlexDice Proc. International Special Workshop on Databases For Next Generation Researchers (SWOD 2005),pp.24-27 (Co-authored) 2005/04
Papers	An Instance-Specific Hardware Algorithm for Finding a Maximum Clique Proc. 14th International Conference on Field Programmable Logic and Applications (FPL2004), LNCS 3203,pp.516-525 (Co-authored) 2004/09
Papers	A Hierarchical Placement Method for Standard Cell Layout Based on Wire Length Driven Clustering Proc. 47th IEEE Midwest Symposium on Circuits and Systems,pp.423-426 (Co-authored) 2004/07
Papers	Timing-Driven Standard Cell Placement with a New Cluster Placement Model The 11th Workshop on Synthesis And System Integration of Mixed Information technologies,pp.272-279 (Co-authored) 2003/04
Papers	A genetic algorithm for the rectilinear Steiner tree problem in VLSI interconnect layout Journal of Information Processing Society of Japan 43 (5),pp.1315-1322 (Sole-authored) 2002/05
Papers	A divide-and-conquer approach to the minimum k-way cut problem Algorithmica 32 (2),pp.262–276 (Co-authored) 2002/01
Papers	An Iterative Improvement Circuit Partitioning Algorithm under Path Delay Constraints IEICE Trans. Fundamentals E83-A (12),pp.2569-2576 (Co-authored) 2000/12
Papers	A genetic algorithm for generating a set of rectilinear Steiner trees in VLSI interconnect layout Proc. International Conference on Chip Design Automation 2000,pp.243-248 (Sole-authored) 2000/08
Papers	Genetic algorithm accelerator GAA-II Proc.2000 Asia-South Pacific Design Automation Conference, University LSI Design Contest,pp.9-10 (Co-authored) 2000/01
Papers	Timing-driven hierarchical global routing with wire-sizing and buffer-insertion for VLSI with multi-routing-layer Proc.2000 Asia-South Pacific Design Automation Conference,pp.99-104 (Co-authored) 2000/01
Papers	An LSI implementation of an adaptive genetic algorithm with on-the-fly crossover operator selection Proc. Asia-South Pacific Design Automation Conference, University LSI Design Contest,pp.37-40 (Co-authored) 1999/01
Papers	Solving the rectangular packing problem by an adaptive GA based on sequence pair Proc. Asia-Pacific Design Automation Conference,pp.181-184 (Co-authored) 1999/01
Papers	A timing-driven floorplanning algorithm with the Elmore delay model for building block layout INTEGRATION, the VLSI journal 27,pp.57-76 (Co-authored) 1999