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ワカバヤシ シンイチ
Wakabayashi Shinichi
若林 真一
所属
広島市立大学 広島市立大学
職種
理事長 学長
著書・論文歴
著書
ワークステーション (共著) 1990
論文
Enhancing security of generalization methods based on m-invariance for dynamic data publication Proc. 2024 IEEE 48th Annual Computer Software and Applications Conference,1554-1555頁 (共著) 2024/07/02
論文
A proposal of equivalnce classes in maximally asymmetric functions and their application to benchmark generation 2024 IEEE 54th International Symposium on Multiple-Valued Logic,65-70頁 (共著) 2024/05/28
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Experimental evaluation on anomaly detection using multiple-valued decision trees in an HSI Proc. 32nd International Workshop on Post-Binary ULSI Systems (共著) 2023/05/21
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Feature vectors based on wire width and distance for lithography hotspot detection IPSJ Transactions on System and LSI Design Methodology 16,2-11頁 (共著) 2023/02
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Introduction of a new method for preventing recipient unapproved transactions to Bitcoin Wallet Proc. 2022 IEEE 46th Annual Computer Software and Applications Conference,767-772頁 (共著) 2022/06/27
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A proposal of equivalance classes for index generation functions based on their row-shift decompositions Proc. 31st International Workshop on Post-Binary ULSI Systems (共著) 2022/05/18
論文
A protocol for preventing transaction commitment without recipient s authorization on blockchain and its implementation IEEE Access 9,24390-24405頁 (共著) 2021
論文
On a Generation Method of Benchmark Maximally Asymmetric Functions Proc. 29th International Workshop on Post-Binary ULSI Systems (共著) 2020/11/11
論文
A framework for fast MapReduce processing considering sensitive data on hybrid
clouds Proc. 2020 IEEE 44th Annual Computer Software and Applications Conference,1357-1362頁 (共著) 2020/07/13
論文
A verifiable secret sharing scheme without using multi-party computations Proc. 2020 IEEE 44th Annual Computer Software and Applications Conference,845-850頁 (共著) 2020/07/13
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A Protocol for Preventing Transaction Commitment without Recipient’s Authorization on Blockchain Proc. 2019 IEEE 43rd Annual Computer Software and Applications Conference (COMPSAC),934-935頁 (共著) 2019/07
論文
A Nearest Neighbor Search Engine Using Distance-based Hashing Proc. 2018 International Conference on Field-Programmable Technology (FPT2018),153-160頁 (共著) 2018/12
論文
An Approximate Nearest Neighbor Search Algorithm Using Distance-Based Hashing Proc. International Conference on Database and Expert Systems Applications (DEXA 2018),203-213頁 (共著) 2018/09
論文
Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection Proc. Euromicro Conference on Digital System Design (DSD2018),85-90頁 (共著) 2018/08
論文
An FPGA-based Nearest Neighbor Search Engine Using Distance-based Hashing for High-Dimensional Data Proc. 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2018),347-352頁 (共著) 2018/03/26
論文
A Programmable Architecture Based on Vectorized EVBDDs for Network Intrusion Detection Using Random Forests Proc. 2017 International Symposium on Nonlinear Theory and Its Applications (NOLTA2017) (共著) 2017/12/04
論文
Table Reference-Based Acceleration of a Lithography Hotspot Detection Method Based on Approximate String Search Proc. 10th International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS2017),10-14頁 (共著) 2017/09/10
論文
An Efficient FPGA Implementation of Mahalanobis Distance-Based Outlier Detection for Streaming Data Proc. 2016 International Conference on Field-Programmable Technology,253-256頁 (共著) 2016/12/03
論文
A High-Speed Programmable Network Intrusion Detection System Based on a Multi-Byte Transition NFA Proc. 9th International Conference on Advances in Circuits, Electronics and Microelecronics,45-51頁 (共著) 2016/07/28
論文
A Hotspot Detection Method Based on Approximate String Search Proc. 9th International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS2016),6-12頁 (共著) 2016/07/24
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Inter-FPGA Routing for Partially Time-Multiplexing Inter-FPGA Signals on Multi-FPGA Systems with Various Topologies IEICE Transactions on Fundamentals E98-A (12),2572-2583頁 (共著) 2015/12/01
論文
An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating IPSJ Transactions on System LSI Desigh Methodology 7,110-118頁 (共著) 2014/08/01
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シストリックアルゴリズムとNFAに基づくパターン非依存正規表現マッチングハードウェア 電子情報通信学会論文誌D J96-D (10),2139-2149頁 (共著) 2013/10/01
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パターン非依存型正規表現ストリングマッチングマシンとそのFPGA実装 電子情報通信学会論文誌D J62-D (12),2159-2167頁 (共著) 2009/12
論文
A Parallel Simulated Annealing Algorithm for LSI Floorplanning Running on Multicore Processors Proc. 24th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2009),851-854頁 (共著) 2009/07
論文
A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set Proc. 2009 International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2009),151-157頁 (共著) 2009/07
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Design and FPGA Implementation of Efficient Discrete Function Generators Using Piecewise Polynomial Approximations Proc. 24th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2009),1016-1019頁 (共著) 2009/07
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A Fast Regular Expression Matching Engine for an FPGA-based Network Intrusion Detection System Proc. 15th Workshop on Synthesis And System Integration of Mixed Information technologies,88-93頁 (共著) 2009/03
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A Systolic Regular Expression Pattern Matching Engine and its Application to Network Intrusion Detection Proc. 2008 IEEE International Conference on Field Programmable Technology (ICFPT 2008),297-300頁 (共著) 2008/12
論文
Efficient FPGA-based Hardware Algorithms for Approximate String Matching Proceedings of the 23rd International Technical Conference on Circuits/Systems, Computers and Communications,201-204頁 (共著) 2008/07
論文
A Systolic Algorithm for the Quadratic Assignment Problem and its FPGA Implementation Proceedings of the International Conference on Field Programmable Technology 2007,261-264頁 (共著) 2007/12
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Design and FPGA Implementation of a High-Speed String Matching Engine Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies,122-129頁 (共著) 2007/10
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A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning Proc. 2007 International Conference on Parallel and Distributed Processing Techniques and Applications,801-807頁 (共著) 2007/06
論文
データを極小歪曲しk-匿名性を保持したデータに変換するプライバシー保護アルゴリズム 日本データベース学会Letters 6 (1),97-100頁 (共著) 2007/06
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FPGA Implementation of Tabu Search for the Quadratic Assignment Problem Proceedings of the 2006 IEEE International Conference on Field Programmable Technology,269-272頁 (共著) 2006/12
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クラスタリング結果の特徴抽出を用いる高次元データの対話的クラスタリング 情報処理学会論文誌:データベース 47 (SIG19 (TOD32)),28-41頁 (共著) 2006/12
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A Decision Method of Attribute Importance for Classification by Outlier Detection Proc. Second International Special Workshop on Databases for Next-Generation Researchers,45-50頁 (共著) 2006/04
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A Parallel Implementation of a Genetic Algorithm-Based Floorplanning Method on PC Clusters Proceedings of the Workshop on Synthesis and System Integration of Mixed Information Technologies,404-411頁 (共著) 2006/04
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FlexDice: 高次元な大規模データセットに対する高速クラスタリング手法 情報処理学会論文誌: データベース 46 (SIG18),40-49頁 (共著) 2005/12
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Solving the Minimum Dominating Set Problem with Instance-Specific Hardware on FPGAs Proc. 2005 IEEE International Conference on Field Programmable Technology (FPT 2005),69-76頁 (共著) 2005/12
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最小支配集合問題を解くインスタンス依存ハードウェア解法 情報科学技術レターズ,37-40頁 (共著) 2005/09
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A Clustering Method Using Irregular Size Cell Graph Proc. RIDE Workshop of Stream Data Mining and Applications RIDE-SDMA 2005 (RIDE: 15th International Workshop on Research Issues on Data Engineering),19-26頁 (共著) 2005/04
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An Algorithm for Computing Global-Based Outlier Degrees on Data Sets Proc. International Special Workshop on Databases For Next Generation Researchers (SWOD 2005),16-19頁 (共著) 2005/04
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Feature Extraction of Clusters Based on FlexDice Proc. International Special Workshop on Databases For Next Generation Researchers (SWOD 2005),24-27頁 (共著) 2005/04
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An Instance-Specific Hardware Algorithm for Finding a Maximum Clique Proc. 14th International Conference on Field Programmable Logic and Applications (FPL2004), LNCS 3203,516-525頁 (共著) 2004/09
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A Hierarchical Placement Method for Standard Cell Layout Based on Wire Length Driven Clustering Proc. 47th IEEE Midwest Symposium on Circuits and Systems,423-426頁 (共著) 2004/07
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Timing-Driven Standard Cell Placement with a New Cluster Placement Model The 11th Workshop on Synthesis And System Integration of Mixed Information technologies,272-279頁 (共著) 2003/04
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A performance-driven floorplanning method with interconnect performance estimation IEICE Trans. Fundamentals Vol.E85-A (12),2775-2784頁 (共著) 2002/12
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VLSI レイアウト設計における配線幅調整とバッファ挿入を考慮した直交スタイナ木を生成する遺伝的アルゴリズム 電子情報通信学会論文誌A Vol.J85-A (8),855-866頁 (共著) 2002/08
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A genetic algorithm for the rectilinear Steiner tree problem in VLSI interconnect layout Journal of Information Processing Society of Japan 43 (5),1315-1322頁 (単著) 2002/05
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適応的遺伝的アルゴリズムに基づくVLSIフロアプランニングの一手法 情報処理学会論文誌 43 (5),1361-1371頁 (共著) 2002/05
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A divide-and-conquer approach to the minimum k-way cut problem Algorithmica 32 (2),262–276 (共著) 2002/01
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An Iterative Improvement Circuit Partitioning Algorithm under Path Delay Constraints IEICE Trans. Fundamentals E83-A (12),2569-2576頁 (共著) 2000/12
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A genetic algorithm for generating a set of rectilinear Steiner trees in VLSI interconnect layout Proc. International Conference on Chip Design Automation 2000,243-248頁 (単著) 2000/08
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任意時刻の複数プロセス故障を考慮したコータリに基づく分散相互排除アルゴリズム 電子情報通信学会論文誌 J83-D-I (8),823-833頁 (共著) 2000/08
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交差手法の適応的選択機能を組み込んだ遺伝的アルゴリズムのLSIチップによる実現 情報処理学会論文誌 41 (6),1766-1776頁 (共著) 2000/06
論文
Genetic algorithm accelerator GAA-II Proc.2000 Asia-South Pacific Design Automation Conference, University LSI Design Contest,9-10頁 (共著) 2000/01
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Timing-driven hierarchical global routing with wire-sizing and buffer-insertion for VLSI with multi-routing-layer Proc.2000 Asia-South Pacific Design Automation Conference,99-104頁 (共著) 2000/01
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遺伝的アルゴリズムにおける個体のエリート度に基づく遺伝オペレータとGAパラメータの適応的調整 電子情報通信学会論文誌D-I J82-D-I (9),1135-1143頁 (共著) 1999/09
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スタンダードセルレイアウト設計におけるセル配置改良をともなうタイミングドリブン端子割当てアルゴリズム 情報処理学会論文誌 40 (4),1606-1617頁 (共著) 1999/04
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An LSI implementation of an adaptive genetic algorithm with on-the-fly crossover operator selection Proc. Asia-South Pacific Design Automation Conference, University LSI Design Contest,37-40頁 (共著) 1999/01
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Solving the rectangular packing problem by an adaptive GA based on sequence pair Proc. Asia-Pacific Design Automation Conference,181-184頁 (共著) 1999/01
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A timing-driven floorplanning algorithm with the Elmore delay model for building block layout INTEGRATION, the VLSI journal 27,57-76頁 (共著) 1999
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