教員総覧
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イナギ マサト
Inagi Masato
稲木 雅人
所属
広島市立大学大学院 情報科学研究科 情報工学専攻
広島市立大学 情報科学部 情報工学科
職種
講師
著書・論文歴
論文
Feature Vectors Based on Wire Width and Distance for Lithography Hotspot Detection 16 (2023),2-11頁 (共著) 2023/02/10
論文
A Proposal of Equivalence Classes for Index Generation Functions Based on Their Row-Shift Decompositions 31st International Workshop on Post-Binary ULSI Systems,9-9頁 (共著) 2022/05/18
論文
On a Generation Method of Benchmark Maximally Asymmetric Functions 29th International Workshop on Post-Binary ULSI Systems,36-41頁 (共著) 2020/11/11
論文
An Approximate Nearest Neighbor Search Algorithm Using Distance-based Hashing DEXA2018 (The 28th International Conference on Database and Expert Systems Applications) (Lecture Notes in Computer Science) 11030,203-213頁 (共著) 2018/09/03
論文
Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection DSD2018 (The 21st Euromicro Digital System Design) 21,85-90頁 (共著) 2018/08/29
論文
An FPGA-based Nearest Neighbor Search Engine Using Distance-based Hashing for High-Dimensional Data SASIMI2018 (The 21st Workshop on Synthesis And System Integration of Mixed Information Technology),347-352頁 (共著) 2018/03/26
論文
A Programmable Architecture Based on Vectorized EVBDDs for Network Intrusion Detection Using Random Forests NOLTA2017 (The 2017 International Symposium on Nonlinear Theory and Its Applications),132-135頁 (共著) 2017/12/04
論文
Table Reference-Based Acceleration of a Lithography Hotspot Detection Method Based on Approximate String Search CENICS2017 (The Tenth International Conference on Advances in Circuits, Electronics and Micro-electronics) 10,8-14頁 (共著) 2017/09/10
論文
An Efficient FPGA Implementation of Mahalanobis Distance-Based Outlier Detection for Streaming Data FPT2016 (Field Programmable Technology),257-260頁 (共著) 2016/12/09
論文
A High-Speed Programmable Network Intrusion Detection System Based on a Multi-Byte Transition NFA CENICS2016 (The ninth international conference on advances in circuits, Electronics and micro-electronics) Proceedings,45-51頁 (共著) 2016/07/24
論文
A Hotspot Detection Method Based on Approximate String Search CENICS2016 (The ninth international conference on advances in circuits, Electronics and micro-electronics) Proceedings,6-12頁 (共著) 2016/07/24
論文
Inter-FPGA Routing for Partially Time-Multiplexing Inter-FPGA Signals on Multi-FPGA Systems with Various Topologies IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences E98-A (12),2572-2583頁 (共著) 2015/12/01
論文
An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating IPSJ Transactions on System LSI Design Methodology 7,110-118頁 (共著) 2014/08
論文
An ILP-based Optimal Circuit Mapping Method for PLDs Proc. the 21st Reconfigurable Architecture Workshop (in International Parallel and Distributed Processing Symposium Workshops),251-256頁 (共著) 2014/05
論文
An NFA-Based Programmable Regular Expression Matching Engine Highly Suitable for FPGA Implementation Proc. the 18th Workshop on Synthesis And System Integration of Mixed Information Technology (SASIMI2013),231-236頁 (共著) 2013/10/21
論文
シストリックアルゴリズムとNFAに基づくパターン非依存正規表現マッチングハードウェア 電子情報通信学会論文誌D J96-D (10),2139-2149頁 (共著) 2013/10/01
論文
A Flexible and Compact Regular Expression Matching Engine Using Partial Reconfiguration for FPGA Proc. the 2013 Euromicro Conference on Digital System Design (DSD2013),293-296頁 (共著) 2013/09/04
論文
A multithreaded Parallel Global Routing Method with Overlapped Routing Regions Proc. the 2013 Euromicro Conference on Digital System Design (DSD2013),591-597頁 (共著) 2013/09/04
論文
GPGPU Implementation of Tabu Search for the Quadratic Assignment Problem Proc. Int. Technical Conf. on Circuit/Systems Computers and Communications 2012 (ITC-CSCC2012) (共著) 2012/07/15
論文
A GPGPU Implementation of Approximate String Matching with Regular Expression Operators and Comparison with Its FPGA Implementation Proc. Int. Conf. Parallel and Distributed Processing Techniques and Applications (PDPTA2012),644-650頁 (共著) 2012/07
論文
A Practical FPGA Implementation of Regular Expression Matching with Look-ahead Assertion Proc. Int. Conf. Engineering of Reconfigurable Systems and Algorithms (ERSA2012),105-110頁 (共著) 2012/07
論文
A Matching Method for Look-ahead Assertion on Pattern Independent Regular Expression Matching Engine Proc. the 17th Workshop on Synthesis And System Integration of Mixed Information Technology (SASIMI2012),361-366頁 (共著) 2012/03/09
論文
Net-based Move in SA-based Placement for a Switch-block-free Reconfigurable Device Proc. the 17th Workshop on Synthesis And System Integration of Mixed Information Technology (SASIMI2012),239-240頁 (共著) 2012/03/08
論文
A Physical Design Method for a New Memory-Based Reconfigurable Architecture without Switch Blocks IEICE Trans. on Information and Systems E95-D (2),324-334頁 (共著) 2012/02
論文
EDA Environment for Evaluating a New Switch-Block-Free Reconfigurable Architecture Proc. the 2011 Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig2011),448-454頁 (共著) 2011/11
論文
An Efficient Hardware Matching Engine for Regular Expression with Nested Kleene Operators Proc. the 21st IEEE Int. Conf. on Field Programabble Logic and applications,157-161頁 (共著) 2011/09/05
論文
シストリック正規表現マッチングハードウェアの拡張:文字列のユニオンの繰り返し量の指定,412-417頁 (共著) 2010/10
論文
Globally Optimal Time-multiplexing of Inter-FPGA Connections for Multi-FPGA Prototyping Systems IPSJ Transaction on System LSI Design Methodology 3,81-90頁 (共著) 2010/02/15
論文
Globally Optimal Time-multiplexing in Inter-FPGA Connections for Accelerating Multi-FPGA Systems Proc. Int. Conf. Field Programmable Logic and Applications 19,212-217頁 (共著) 2009/08
論文
A Parallel Simulated Annealing for LSI Floorplanning Running on Multi-core Processors Proc. Int. Technical Conf. on Circuit/Systems Computers and Communications 2009 24,851-854頁 (共著) 2009/07
論文
Design and FPGA Implementation of Efficient Discrete Function Generators Using Piecewise Polynomial Approximations Proc. Int. Technical Conf. on Circuit/Systems Computers and Communications 2009 24,1016-1019頁 (共著) 2009/07
論文
Evaluation of Introducing Multiple Time-multiplexing Degrees to Inter-FPGA Connections on Multi-FPGA Systems Proc. Int. Technical Conf. on Circuit/Systems Computers and Communications 2009 24,1032-1035頁 (共著) 2009/07
論文
Optimal Time-Multiplexing in Inter-FPGA Connections for Accelerating Multi-FPGA Prototyping Systems IEICE Transactions on Fundamentals E91-A (12),3539-3547頁 (共著) 2008/12
論文
ILP-based Optimization of Time-multiplexed I/O Assignment for Multi-FPGA Systems Proceedings of IEEE International Symposium on Circuit and Systems 2008,1800-1803頁 (共著) 2008/05
論文
A Performance-driven Bipartitioning Method for Multi-FPGA Implementation with Time-multiplexed I/Os IEICE Transactions on Fundamentals E90-A (5),924-931頁 (共著) 2007/05
論文
A Performance-driven Circuit Bipartitioning Algorithm for Multi-FPGA Implementation with Time-multiplexed I/Os Proc. Int. Conf. on Field Programmable Technology 2006,361-364頁 (共著) 2006/12
論文
Network-Flow Based Delay Aware Partitioning Algorithm Proceedings of the 13th Workshop on Synthesis and System Integration of Mixed Information technologies 13,417-422頁 (共著) 2006/04
論文
An Improvement of Network-Flow Based Multi-Way Circuit Partitioning Algorithm IEICE Transactions on Fundamentals E85-A (3),655-663頁 (共著) 2002/03
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