Faculty Information - Nagayama Shinobu |

Nagayama Shinobu

Department / Course

Hiroshima City University Graduate School Graduate School of Information Sciences Major in Computer and Network Engineering

Hiroshima City University Faculty of Information Sciences Department of Computer and Network Engineering

Job Professor

Academic conference presentation
2024/05/29	A Proposal of Equivalence Classes in Maximally Asymmetric Functions and Their Application to Benchmark Generation (IEEE International Symposium on Multiple-Valued Logic)
2023/05/22	Decomposition-Based Representation of Symmetric Multiple-Valued Functions (IEEE International Symposium on Multiple-Valued Logic)
2022/05/21	On Decision Diagrams for Maximally Asymmetric Functions (IEEE International Symposium on Multiple-Valued Logic)
2021/05/25	Improvement in the Quality of Solutions of a Heuristic Linear Decomposer for Index Generation Functions (IEEE International Symposium on Multiple-Valued Logic)
2020/11/11	On a Generation Method of Benchmark Maximally Asymmetric Functions (29th International Workshop on Post-Binary ULSI Systems)
2020/11/09	On Optimum Linear Decomposition of Symmetric Index Generation Functions (IEEE International Symposium on Multiple-Valued Logic)
2019/05/23	インデックス生成関数の最適な線形分解のための動的計画法 (IEEE International Symposium on Multiple-Valued Logic)
2018/05/17	インデックス生成関数の線形分解のためのZDDを用いた厳密最適化手法化 (IEEE International Symposium on Multiple-Valued Logic)
2018/03/27	An FPGA-based Nearest Neighbor Search Engine Using Distance-Based Hashing for High-Dimensional Data (Workshop on Synthesis And System Integration of Mixed Information technologies)
2017/05/23	インデックス生成関数の線形分解のための厳密最適化アルゴリズム (IEEE International Symposium on Multiple-Valued Logic)
2017/02/23	Development of fast and reliable network intrusion detection systems underlying IoT (新世代ICTの羅針盤 - 通研共同プロジェクトからのメッセージ -)
2016/12/09	An efficient FPGA implementation of Mahalanobis distance-based outlier detection for streaming data (IEEE International Conference on Field Programmable Technol-ogy)
2016/05/18	インデックス生成関数の線形分解のための効率的な発見的手法 (IEEE International Symposium on Multiple-Valued Logic)
2015/05/20	多状態システムの解析の高速化のためのEVMDDの枝削減 (IEEE International Symposium on Multiple-Valued Logic)
2014/09/19	保守性の高い高速なネットワーク侵入検知のための正規表現マッチング手法について (11th International Workshop on Boolean Problems (IWSBP 2014))
2014/05/21	部分的に依存関係のある部品を持つ多状態システムの多値決定グラフを用いた解析法 (IEEE International Symposium on Multiple-Valued Logic)
2013/10/22	An NFA-based programmable regular expression matching engine highly suitable for FPGA implementation (Workshop on Synthesis And System Integration of Mixed Information technologies)
2013/09/08	Regular Expression Matching Using ZBDDs (Invited Talk at the University of Nis, Serbia)
2013/09/04	A flexible and compact regular expression matching engine using partial reconfiguration for FPGA (EUROMICRO Conference on Digital System Design Architectures, Methods, and Tools)
2013/05/25	ZBDDを用いた効率的な正規表現マッチング手法 (Reed-Muller Workshop 2013)
2013/05/24	多状態システムの高速な解析のための変数グループ化によるEVMDDの枝数最小化手法 (IEEE International Symposium on Multiple-Valued Logic)
2012/05/14	Analysis of Multi-State Systems with Multi-State Components Using EVMDDs (IEEE International Symposium on Multiple-Valued Logic)
2012/05/14	What are going to be the key MVL innovations over the next 10 years? (IEEE International Symposium on Multiple-Valued Logic)
2011/09/02	A design method for programmable two-variable discrete function generators using spline and bilinear interpolations (EUROMICRO Conference on Digital System Design Architectures, Methods, and Tools)
2011/05/23	Numeric Function Generators Using Piecewise Arithmetic Expressions (IEEE International Symposium on Multiple-Valued Logic)
2010/05/27	Floating-Point Numerical Function Generators Using Piecewise-Split EVMDDs (IEEE International Symposium on Multiple-Valued Logic)
2009/10/07	Hardware Accelerators for Regular Expression Matching and Approximate String Matching (Asia-Pacific Signal and Information Processing Association Annual Summit and Conference)
2009/07/14	A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set (International Conference on Engineering of Reconfigurable Systems and Algorithms)
2009/07/07	Design and FPGA Implementation of Efficient Discrete Function Generators Using Piecewise Polynomial (The 24th International Technical Conference on Circuits/Systems, Computers and Communications)
2009/05/23	Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions (IEEE International Symposium on Multiple-Valued Logic)
2009/05/20	Numeric function generators using decision diagrams for discrete functions (18th International Workshop on Post-Binary ULSI Systems)
2009/03/09	A fast regular expression matching engine for an FPGA-based network intrusion detection system (Workshop on Synthesis And System Integration of Mixed Information technologies)
2008/12/08	A systolic regular expres-sion pattern matching engine and its appli-cation to network intrusion de-tection (IEEE International Conference on Field Programmable Technol-ogy)
2008/09/08	Numerical function generators using bilinear interpolation (International Conference on Field Programmable Logic and Applications)
2008/09/05	Programmable numerical function generators for two-variable functions (EUROMICRO Conference on Digital System Design Architectures, Methods, and Tools)
2008/05/22	Representations of Two-Variable Elementary Functions Using EVMDDs and Their Applications to Function Generators (IEEE International Symposium on Multiple-Valued Logic)
2007/12/14	A systolic algorithm for the quadratic assignment problem and its FPGA implementation (International Conference on Field Programmable Technology)
2007/10/15	Design and FPGA implementation of a high-speed string matching engine (Workshop on Synthesis And System Integration of Mixed Information technologies)
2007/08/29	Design method for numerical function generators based on polynomial approximation for FPGA implementations (EUROMICRO Conference on Digital System Design Architectures, Methods, and Tools)
2007/05/14	Representations of elementary functions using edge-valued MDDs (IEEE International Symposium on Multiple-Valued Logic)
2007/01/25	Numerical function generators using edge-valued binary decision diagrams (Asia and South Pacific Design Automation Conference)
2006/12/13	FPGA implementation of tabu search for the quadratic assignment problem (International Conference on Field Programmable Technology)
2006/05/20	Representations of elementary functions using binary moment diagrams (IEEE International Symposium on Multiple-Valued Logic)
2006/04/04	A parallel implementation of a genetic algorithm-based floorplanning method on PC clusters (Workshop on Synthesis And System Integration of Mixed Information technologies)
2006/01/26	Programmable numerical function generators based on quadratic approximation: architecture and synthesis method (Asia and South Pacific Design Automation Conference)
2005/08/24	Programmable numerical function generators: architectures and synthesis method (International Conference on Field Programmable Logic and Applications)
2004/06/03	On the minimization of longest path length for decision diagrams (International Workshop on Logic and Synthesis)
2004/05/21	On the minimization of average path lengths for heterogeneous MDDs (IEEE International Symposium on Multiple-Valued Logic)
2004/01/30	Minimization of memory size for heterogeneous MDDs (Asia and South Pacific Design Automation Conference)
2003/05/18	Compact representations of logic functions using heterogeneous MDDs (IEEE International Symposium on Multiple-Valued Logic)
2003/04/04	Code generation for embedded systems using heterogeneous MDDs (Workshop on Synthesis And System Integration of Mixed Information technologies)
2002/05/24	Representations of logic functions using QRMDDs (IEEE International Symposium on Multiple-Valued Logic)
2020/09/05	Proposal of Decision and Generation Methods for Maximally Asymmetric Multiple-Valued Functions
2017/09/17	An Exact Solution for Optimum Linear Decomposition of Index Generation Functions
2013/07/16	On Regular Expression Matching Using ZDDs
2009/12/17	Complexities of Graph-Based Representations for Elementary Functions