Book and thesis
Papers
Rumpfr: A Fast and Memory Leak-Free Rust Binding to the GNU MPFR Library Journal of Information Processing,pp.676-684 (Co-authored) 2021
Papers
OSAIFU: A Source Code Factorizer on Android Studio Proc. 35th IEEE International Conference on Software Maintenance and Evolution (ICSME 2019),pp.422-425 (Co-authored) 2019/10/04
Papers
Efficient Searching for Essential API Member Sets based on Inclusion Relation Extraction International Journal of Networked and Distributed Computing,pp.149-157 (Co-authored) 2019/09
Papers
SAIFU: Supporting Program Understanding by Automatic Indexing of Functionalities in Source Code International Journal of Networked and Distributed Computing,pp.167-174 (Co-authored) 2019/09
Papers
A Study on a Lane Keeping System using CNN for Online Learning of Steering Control from Real Time Images Proc. 34th International Technical Conference on Circuits / Systems, Computers and Communications (ITC-CSCC 2019) (Co-authored) 2019/06/25
Papers
A Study of a Parallel Architecture for Accelerating Batch-Learning Self-Organizing Map by using Dedicated Hardware Proc. 34th International Technical Conference on Circuits / Systems, Computers and Communications (ITC-CSCC 2019) (Co-authored) 2019/06/24
Papers
Extracting Inclusion Graphs of API Member Sets to Improve Searchability Proc. 17th IEEE/ACIS International Conference on Software Engineering, Management and Applications (SERA 2019),pp.53-59 (Co-authored) 2019/05/29
Papers
Supporting Program Understanding by Automatic Indexing of Functionalities in Source Code Proc. 17th IEEE/ACIS International Conference on Software Engineering, Management and Applications (SERA 2019),pp.13-18 (Co-authored) 2019/05/29
Papers
Easy-Going Development of Event-Driven Applications by Iterating a Search-Select-Superpose Loop Journal of Information Processing,pp.257-267 (Co-authored) 2019/03
Papers
Resolving Ambiguous Types in Haskell by Checking Uniqueness of Type Variable Assignments under Type Class Constraints Journal of Information Processing,pp.87-94 (Co-authored) 2019/01
Papers
Traf: a Graphical Proof Tree Viewer Cooperating with Coq through Proof General Proc. 16th Asian Symposium on Programming Languages and Systems (APLAS 2018), LNCS 11275,pp.157-165 (Co-authored) 2018/12/03
Papers
Effective Indexing based on the TF-IDF Method with Selected Terms for Discovering Usages of APIs from Open Source Repositories Proc. 32th International Technical Conference on Circuits / Systems, Computers and Communications (ITC-CSCC 2017),pp.684-687 (Co-authored) 2017/07/05
Papers
Speeding up Exact Real Arithmetic on Fast Binary Cauchy Sequences by using Memoization based on Quantized Precision Journal of Information Processing,pp.494-504 (Sole-authored) 2017/07
Papers
Improving Floating-Point Numbers: A Lazy Approach to Adaptive Accuracy Refinement for Numerical Computations Proc. 25th European Symposium on Programming (ESOP) 2016, LNCS 9632, pp.390-418, 2016. DOI: 10.1007/978-3-662-49498-1_16,pp.390-418 (Co-authored) 2016/04
Papers
Improving Floating-Point Numbers: a Lazy Approach to Adaptive Accuracy Refinement for Numerical Computations (Co-authored) 2014/03
Papers
A MATLAB-Based Code Generator for Parallel Sparse Matrix Computations utilizing PSBLAS IEICE Trans. Inf. & Syst.,pp.2-12 (Co-authored) 2007/01
Papers
A Processor with Program Protection Feature by use of Public Key Cryptosystem IPSJ Trans. Advanced Computing Systems,pp.55-64 (Co-authored) 2006/11
Papers
Design and Implementation of a MATLAB-Based Statically-Typed Language for Matrix Computations IPSJ Transactions on Programming,pp.21-36 (Co-authored) 2006/05
Papers
A MATLAB-Based Code Generator for Sparse Matrix Computations Lecture Notes in Computer Science (Proc. APLAS2004),pp.280-295 (Co-authored) 2004/11
Papers
CMC: A Compiler for Sparse Matrix Computations IPSJ Transactions on Advanced Computing Systems,pp.378-392 (Co-authored) 2004/10
Papers
Fast Execution of Linear Recurrences on Vector Computers and Its Parallelization Journal of IPSJ,pp.971-985 (Co-authored) 2002/04
Papers
Bulk Recurrent Parallel Processing: A Method of Parallel Execution for Non-doall Loops IPSJ Transactions on High-Performance Systems,pp.111-123 (Co-authored) 2001/11
Papers
ASAver.1: An FPGA-Based Education Board for Computer Architecture/System Design IEICE Transactions on Fundamentals,pp.1826-1833 (Co-authored) 1997/10
Papers
Virtualization of Semiconductor Extended Storage as Extended Main Memory on Vector Supercomputers Journal of IPSJ,pp.2558-2568 (Co-authored) 1994/12