Faculty Information - Nagayama Shinobu |

（Last updated : 2024-03-14 20:05:52）

Nagayama Shinobu

Department / Course Hiroshima City University Graduate School Graduate School of Information Sciences Major in Computer and Network Engineering

Hiroshima City University Faculty of Information Sciences Department of Computer and Network Engineering

Job Professor

E-Mail Address

Profile
1. Development of logic simulator 2. Optimization of Decision Diagram and its application 3. Synthesis method of numerical function generators 4. Design method of digital signal synthesizers 5. Analysis of multi-state systems with multi-state components using decision diagrams 6. Regular expression matching methods using decision diagrams 7. Development of In-Vehicle Network Intrusion Prevention Systems 8. Development of Self-learning Systems for High Speed Detection of Intrusion into Next Generation In-Vehicle Network 9. Development of Fast Visual Inspection Systems Aiming to Promotion of Smart Factories in Rural Area

Business career
2004/10/01 ～ 2005/03/31	Invited Researcher Kitakyushu Foundation for the Advancement of Industry, Science and Technology (FAIS)
2005/04/01 ～ 2008/03/31	Research Associate (Assistant Professor) Hiroshima City University Faculty of Information Sciences Dept. of Computer Engineering
2008/04/01 ～ 2010/03/31	Lecturer Hiroshima City University Graduate School of Information Sciences Dept. of Computer and Network Engineering
2010/04/01 ～ 2016/03/31	Associate Professor Hiroshima City University Graduate School of Information Sciences Dept. of Computer and Network Engineering
2016/04/01	Professor Hiroshima City University Graduate School of Information Sciences Dept. of Computer and Network Engineering
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Academic background
1996/04/01～2000/03/31	Dept. of Computer Science Faculty of Science and Engineering Meiji University Graduated
2000/04/01～2002/03/31	Doctoral Program (1st Semester) Graduate School, Division of Science and Engineering Meiji University Finished
2002/04/01～2004/09/30	Doctoral Program (2nd Semester) Graduate School, Division of Information Engineering Kyushu Institute of Technology Finished
2004/09/30 Degree Acquisition	Ph.D in Computer Engineering

Present specialized field
Fundamental Informatics keyword(*)


2023/04/01 2027/03/31	Development of Fast Visual Inspection Systems Aiming to Promotion of Smart Factories in Rural Area
2019/04/01 2023/03/31	Development of Self-learning Systems for High Speed Detection of Intrusion into Next Generation In-Vehicle Network
2016/04/01 2019/03/31	Development of In-Vehicle Network Intrusion Prevention Systems
2012/04/01 2016/03/31	Regular expression matching methods using decision diagrams
2010/04/01 2016/03/31	Design method of digital signal synthesizers
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Development of Fast Visual Inspection Systems Aiming to Promotion of Smart Factories

Research topic, funded research, and department laboratory expense
2006/04/01 ～ 2008/03/31	Research on development of synthesis and verification systems for numerical function generators
2006/04/01 ～ 2008/03/31	Research on representations of elementry functions using decision diagrams and their applications
2008/04/01 ～ 2010/03/31	Research on development of synthesis system for multivariable numerical function generators
2008/04/01 ～ 2010/03/31	Research on graph-based representations of multiple-variable mathematical functions and floating-point mathematical functions
2010/04/01 ～ 2013/03/31	Research on development of a reconfigurable digital signal synthesizer and its design automation
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Book and thesis
Papers	On Representation of Maximally Asymmetric Functions Based on Decision Diagrams Journal of Applied Logics 10 (6),pp.1105-1130 (Co-authored) 2023/12/01
Papers	Feature Vectors Based on Wire Width and Distance for Lithography Hotspot Detection IPSJ Transactions on System LSI Design Methodology,pp.2-11 (Co-authored) 2023/02/01
Papers	A Fast Method for Exactly Optimum Linear Decomposition of Index Generation Functions Journal of Multiple-Valued Logic and Soft Computing,pp.387-405 (Co-authored) 2022/06/01
Papers	An exact optimization method using ZDDs for linear decomposition of symmetric index generation functions International Federation of Computational Logic Journal of Logic and Their Applications,pp.1849-1866 (Co-authored) 2018/12/01
Papers	A balanced decision tree based heuristic for linear decomposition of index generation functions IEICE Transactions on Information and Systems,pp.1583-1591 (Co-authored) 2017/08/01
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Academic conference presentation
2023/05/22	Decomposition-Based Representation of Symmetric Multiple-Valued Functions (IEEE International Symposium on Multiple-Valued Logic)
2022/05/21	On Decision Diagrams for Maximally Asymmetric Functions (IEEE International Symposium on Multiple-Valued Logic)
2021/05/25	Improvement in the Quality of Solutions of a Heuristic Linear Decomposer for Index Generation Functions (IEEE International Symposium on Multiple-Valued Logic)
2020/11/11	On a Generation Method of Benchmark Maximally Asymmetric Functions (29th International Workshop on Post-Binary ULSI Systems)
2020/11/09	On Optimum Linear Decomposition of Symmetric Index Generation Functions (IEEE International Symposium on Multiple-Valued Logic)
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Lecturer and lecture
2015/02/20	高速かつ高信頼なネットワーク侵入検知システムの構成 (Southern Methodist University, Dallas, TX, USA)

Acquisition patent
2013/08/19	Analysis Method and Analysis Machine for Multi-State Systems （2013-161411）
2012/11/14	Diagnosis Method and Diagnosis Machine for Multi-State Systems （2012-250017）

Winning science prize
2021/03/24	Faculty of the Year Award, 2020
2020/03/25	Faculty of the Year Award, 2019
2020/03/25	Faculty of the Year Special Award, 2019
2019/05/22	Outstanding Contributed Paper Award, 48th IEEE ISMVL
2019/03/20	Faculty of the Year Award, 2018
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Educational ability

●Prepared Textbook and Other Teaching Materials

2014/11/01	Applications of Zero-Suppressed Decision Diagrams

Belonging society
2008	ACM
2006	IPS
2006	Japan Research Group of Multiple-Valued Logic
2002	IEEE
2002	IEICE

Committee and society
2023/03 ～ 2025/03	ASPDAC2025 Organizing Committee Member (Publication Chair)
2022/05/20 ～ 2023/05	53rd IEEE International Symposium on Multiple Valued Logic Publication Chair, Publicity Chair
2022/01/20 ～ 2023/12/31	IEEE Computer Society, Technical Committee on Multiple-Valued Logic Secretary/Web Editor
2022/01/01 ～ 2023/12/31	IEEE Circuits and Systems Society Japan Joint Chapter Secretary
2021/07/31 ～ 2022/05/21	52nd IEEE International Symposium on Multiple Valued Logic Program Committee
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