Faculty Information - Hironaka Tetsuo |

（Last updated : 2024-03-14 16:10:02）

Hironaka Tetsuo

Department / Course Hiroshima City University Graduate School Graduate School of Information Sciences Major in Computer and Network Engineering

Hiroshima City University Faculty of Information Sciences Department of Computer and Network Engineering

Job Professor

Profile
Tetsuo Hironaka received his B.E. degree from Yamaguchi University in 1988 and received his M.S. and Ph.D. degrees in Engineering from Kyushu University in 1990 and 1993, respectively. From 1993 to 1994, he served as a Research Associate at Kyushu University. From 1994 to 2006, he was an Associate Professor at Hiroshima City University. Since 2006, He has been a Professor at the Computer Architecture lab., Hiroshima City University. His research interests are in the areas of reconfigurable architecture, parallel processing architecture and system software.

Business career
2020/09/01 ～ 2025/03/31	Director Hiroshima City University Library
2015/04/01 ～ 2023/03/31	Deputy Director (Academic Affairs) Hiroshima City University
2007/04/01	Professor Hiroshima City University Department of Computer and Network Engineering, Graduate School of Information Sciences
2006/10/01 ～	Professor Hiroshima City University Graduate School Graduate School of Information Sciences Major in Computer and Network Engineering
2006/10/01 ～	Professor Hiroshima City University Faculty of Information Sciences Department of Computer and Network Engineering
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Academic background
1993/07 Degree Acquisition	Kyushu University Information Engineering Ph.D. (Engineering)
1990/04～1993/03	Doctorial Information system Graduate School, Division of Integrated Science and Engineering Kyushu University Expired with Credits Obtained
1990/03 Degree Acquisition	Kyushu University Information Engineering Master of Engineering
1988/04～1990/03	Doctorial Information system Graduate School, Division of Integrated Science and Engineering Kyushu University Finished
1988/03 Degree Acquisition	Yamaguchi University Electric Engineering Bachelor of Engineering
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We study the methods to increase the performance of a computer system, while at the same time keeping it easy to use and reliable. In our laboratory we are working on these themes from both sides, from the hardware and software sides, to seek the breakthrough for the new computer architecture.

Image
Evaluation of the developed device	Developed reconfigurable device SePLD
Demo using Developed Hard & Soft	LSI with University’s Emblem

Present specialized field
Computer Architecture, Reconfigurable system, Computer system, Software Engineering keyword(Computer Architecture, Reconfigurable Computing, Reconfigurable Processor, Multiprocessor, Parallel Processing, VLSI Architecture)


2020/07/30	Airway obstruction analysis using neural network
2020/07/03	Research on respiratory status analysis system using body movement information
2017/04/01	Real-time electronic circuit simulation using reconfigurable devices
2016	Research on place and route method for reconfigurable devices using machine learning
2015 2016	Research of security techniques for cancer sensor chip
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Research and development of accelerators using reconfigurable devices

Research topic, funded research, and department laboratory expense
1994 ～ 1995	Research on VLSI design education
1994 ～ 1995	Development of educational microprocessor system for information science education
1994 ～ 1994	Research of technique for optimizing object program by interactive operation
1995 ～ 1995	Research of workbench for processor architecture and object code evaluation
1995 ～ 1997	Achievement of parallel computer environment that uses educational workstation in school etc. and applied research into algorithm
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Book and thesis
Books	Reconfigurable Systems (Co-authored) 2005/08
Papers	Exploration of Acceleration of FPGA-based Linear Equation Solver using Approximate Division in Electronic Circuit Simulator,pp.93-98 (Co-authored) 2024/01/22
Papers	How to Support Programming with Algebraic Effects Effectively,pp.9-16 (Co-authored) 2024/01/06
Papers	Exploring Digital Tools to Revitalize Local Communities -Considering an Easy-to-Use Community App for All Ages and Genders-,pp.65-68 (Co-authored) 2024/01/06
Papers	Study of learning time for FPGA size of neural network that judges quality of place of logic elements in placement and routing of FPGA,pp.R23-26-11 (Co-authored) 2023/10/28
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Academic conference presentation
2022/11/13	Design of a Quadruple Precision Floating-Point Arithmetic Unit for FPGA and its Evaluation by Conjugate Gradient Linear Solver (The International Conference for High Performance Computing, Networking, Storage and Analysis (SC22))
2019/11/17	FPGA Implementation of Real-Time Analog In-Circuit Emulation System for Electronic Circuit Boards (The International Conference for High Performance Computing, Networking, Storage and Analysis (SC19))
2019/11/17	Study of logic element placement algorithm which introduced neural network to cost function (The International Conference for High Performance Computing, Networking, Storage and Analysis (SC19))
2018/11/12	Trial Implementation of Single-Source Shortest Path Problem using FPGA with Multiport and Multibank Memory (The International Conference for High Performance Computing, Networking, Storage and Analysis)
2017/11/13	Prototyping a C-to-OpenCL Translator that Generates FPGA-CPU Hybrid Execution Code (The International Conference for High Performance Computing, Networking, Storage and Analysis)
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Acquisition patent
2015/12/15	SEMCONDUCTOR DEVICE （US 9214209 B2）
2015/02/24	SEMCONDUCTOR DEVICE HAVING A NON-VOLATILE MEMORY BUILT-IN （US 8964460 B2）
2015/02/10	SEMICONDUCTOR DEVICE （US 8952721 B2）
2013/12/13	Semiconductor device （5432344）
2012/10/09	SEMICONDUCTOR DEVICE （US 8283945 B2）
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Winning science prize
2018/07/06	The 32nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2017) ITC-CSCC2017 Best Paper Award
2008/04/24	The 10nd LSI IP Design Award MeP Encouragement Prize
2007/04/26	The 9th LSI IP Design Award Development Research Aid Prize
2006/05/18	The 8nd LSI IP Design Award Development Encouragement Prize
2005/09/09	Information and System Society Activity Service Prize (IEICE)
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Subject
Three faculty joint basic exercises
Operating Systems
Computer architecture
Advanced Computer Architecture

Educational ability

●Prepared Textbook and Other Teaching Materials

2007/03	Top Down Design and Verification Techniques for Digital Systems

Activity in society
2018/03 ～ 2018/12	Advisory Committee member of the 2018 International Conference on Field-Programmable Technology (FPT'18)
2014/03 ～ 2014/12	Program Committee Member for The 2014 International Conference on Field-Programmable Technology (FPT'14)
2011/03/28 ～ 2013/02	University LSI Design Contest（UDC)
2009/03 ～ 2009/09	Program Committee Member for the 19th International Conference on Field Programmable Logic and Applications (FPL2009)
2009/03 ～ 2009/12	Program Committee Member for The 2009 International Conference on Field-Programmable Technology (FPT'09)
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Belonging society
1999/04 ～	The Institue of Electronics, Information and Communication Engineers
1990/04 ～	Information Processing Society of Japan
1993 ～	ACM
1994 ～	IEEE
2021/05/22 ～	The Japanese Dental Society of Anesthesiology

Committee and society
2000 ～ 2003	Information Processing Society of Japan Thesis magazine edit committee
1999 ～ 2002	The Institue of Electronics, Information and Communication Engineers English thesis magazine edit committee